ISEP | Auditório CISTER
15 March 2013 | 11:00 & 14:30
O Centro de Investigação em Sistemas Confiáveis e de Tempo-Real (CISTER) promove uma sessão dupla da CISTER Distinguished Seminar Series no dia 15. Joël Goossens (Université Libre de Bruxelles) e Kees Goossens (Eindhoven University of Technology) são os oradores-convidados.
JOB PARTITIONING STRATEGIES FOR MULTIPROCESSOR SCHEDULING OF REAL-TIME PERIODIC TASKS WITH RESTRICTED MIGRATIONS
Joël Goossens | 11:00
In this work, we consider the scheduling of real-time periodic tasks on multiprocessors under a restricted-migration constraint (tasks are allowed to migrate whereas jobs are not). We first propose a technique, (offline) job partitioning, which statically assigns jobs to processors before execution. We show that (offline) job partitioning strictly dominates both partitioned and restricted-migration scheduling. We then consider r-rm, a restricted-migration variant of global rm, we design a sufficient schedulability test and we provide a speedup factor for the scheduler.
COMPSOC: A MIXED-CRITICALITY MULTI-MOC EXECUTION PLATFORM
Kees Goossens | 14:30
Cyber-physical, embedded real-time systems contain multiple concurrent applications that have different characteristics and requirements, and are often designed by different parties. As a result, a single system contains applications designed using different models of computation (MOC), and with different criticalities (e.g. real time, safety critical, adaptive, or not). By offering an independent execution virtual platform to each application, the CompSOC platform enables independent design, verification, and execution of applications with different criticalities and models of computation. In this presentation we present the concepts and current status of the CompSOC platform.
JOËL GOOSSENS, ULB
Full-time Professor (Chargé de cours) at the Université Libre de Bruxelles, in the Computer Science Department (Département d´Informatique).
Joël Goossens received his M.Sc. degree in computer science in 1992 (licence en informatique), his M.Sc. degree in network and management in 1993 (licence spéciale en télématique et organisation) and his Ph.D. degree in computer science in 1999 (thèse de doctorat en sciences, spécialité informatique), all from the Université Libre de Bruxelles, Belgium.
He founded and he is chairing the "Parallel Architectures for Real-Time Systems" research group. He teaches algorithms and programming, real-time scheduling, operating systems.
His main research interests are presently in real-time scheduling theory, real-time operating systems and embedded systems.
KEES GOOSSENS, TU/E
Kees Goossens has a BSc in computer science from the University of Wales (1988), and a PhD from the University of Edinburgh (1993). In his thesis he investigated the formal verification of hardware, in particular by using semi-automated proof systems in conjunction with formal semantics of hardware description languages such as ELLA and VHDL.
He continued this work at several other universities before joining Philips Research in the Netherlands in 1995. At Philips he worked on behavioural synthesis for high-throughput video processing, then on on-chip communication protocols and memory management.
Until 2010, at Philips/NXP Semiconductors Research he led the team that defined te Aethereal network on chip for consumer electronics, where real-time performance and low cost are major constraints. He was also part-time full professor at the Delft University of Technology from 2007 to 2010, and is currently full professor at the Eindhoven University of Technology, where his research focusses on composable (virtualised), predictable (real-time), low-power embedded systems, supporting multiple models of computation.
He is editorial board member for the ACM Transactions on Design Automation of Electronic Systems (TODAES), associate editor for the Springer Journal of Design Automation of Embedded Systems (DAEM), and member of the editorial review board of the Resources Management Association (IRMA) International Journal of Embedded and Real-Time Communication Systems (IJECRTS), and was guest editor for several special issues on networks on chip.
He is author on 24 patents and 19 patent applications, and published two books, 100+ articles, with four paper awards (including CODES+ISSS). His 2003 paper was selected as one of the 30 most influential papers of 10 years of the DATE conference. He is or was steering committee member of ACSD, DATE, NOCS, MPSOC, and TPC member of CODES+ISSS, DATE, DSD, FPL, ICPP, INA-OCMC, PARMA, ReConFig, SAMOS, SDR, SOC, and VLSI-SOC.